Simple Finite State Machine
A good article about Finite State Machine here.
A good article about Finite State Machine here.
—————————————————–
— FSM for multiplier
— CG – 21 Jan 2011
—————————————————–
library ieee ;
use ieee.std_logic_1164.all;
—————————————————–
entity fsm_multiplierCG_1 is
port(
A0,A1,A2,A3: in bit_vector(1 downto 0);
opA : out bit_vector(1 downto 0);
clock: in std_logic;
reset: in std_logic
);
end fsm_multiplierCG_1;
—————————————————–
architecture FSM of fsm_multiplierCG_1 is
— define the states of FSM model
type state_type is (S0, S1, S2, S3);
signal next_state, current_state: state_type;
begin
— cocurrent process#1: state registers
state_reg: process(clock, reset)
begin
if (reset=’1′) then
current_state <= S0;
elsif (clock’event and clock=’1′) then
current_state <= next_state;
end if;
end process;
— cocurrent process#2: combinational logic
comb_logic: process(current_state, clock)
begin
— use case statement to show the
— state transistion
case current_state is
when S0 => opA <= A0;
next_state <= S1;
when S1 => opA <= A1;
next_state <= S2;
when S2 => opA <= A2;
next_state <= S3;
when S3 => opA <= A3;
next_state <= S0;
end case;
end process;
end FSM;
—————————————————–
find a good example here http://lapwww.epfl.ch/courses/archord1/labs/A_8bit_Sequential_Multiplier.pdf
and more examples and answers here!
http://lapwww.epfl.ch/courses/archord1/
keep in spirit, yach!
tengkyu big-a
Wah, itu menarik sekali untuk dibahas lho, apalagi dari sisi matematisnya, bisa sampe menggunakan teori kategori dan fungtor, coba tanya bu Intan… 🙂