3 bit 5-to-1 mux


--CG praktikum lagi
--Dec 30th 2010
--3 bit 5-to-1 mux

library ieee;
use ieee.std_logic_1164.all;

entity LabExCG6 is
port (--u, v, w, x, y : in std_logic_vector(2 downto 0);
-- s : in std_logic_vector(2 downto 0);
-- m : out std_logic_vector(2 downto 0)
u0, u1, u2 : in bit;
v0, v1, v2 : in bit;
w0, w1, w2 : in bit;
x0, x1, x2 : in bit;
y0, y1, y2 : in bit;
s0, s1, s2 : in bit;
m0, m1, m2 : out bit
);

end LabExCG6;

architecture Behavior of LabExCG6 is
component MUX_3_BIT_2_TO_1
port
(--x,y: in std_logic_vector(2 downto 0);
--s: in std_logic_vector(2 downto 0);
--m: out std_logic_vector(2 downto 0)
a0, a1, a2, b0, b1, b2 : in bit;
sel : in bit;
m_out0, m_out1, m_out2 : out bit
);
end component;
signal m00, m01, m02, m10, m11, m12, m20, m21, m22: bit;
begin
MUX0: MUX_3_BIT_2_TO_1 port map (u0, u1, u2, v0, v1, v2, s0, m00, m01, m02);
MUX1: MUX_3_BIT_2_TO_1 port map (w0, w1, w2, x0, x1, x2, s0, m10, m11, m12);
MUX2: MUX_3_BIT_2_TO_1 port map (m00, m01, m02, m10, m11, m12, s1, m20, m21, m22);
MUX3: MUX_3_BIT_2_TO_1 port map (m20, m21, m22, y0, y1, y2, s2, m0, m1, m2);
-- MUX0: MUX_3_BIT_2_TO_1 port map (u, v, s(0), m1);
-- MUX1: MUX_3_BIT 2_TO_1 port map (w, x, s(0), m2);
-- MUX2: MUX_3_BIT_2_TO_1 port map (m1, m2, s(1), m3);
-- MUX3: MUX_3_BIT_2_TO_1 port map (m3, y, s(2), m);
end Behavior;

--entity LabExCG6 is
entity MUX_3_BIT_2_TO_1 is
port
( --a, b: in std_logic_vector(2 downto 0);
a0, a1, a2, b0, b1, b2 : in bit;
sel : in bit;
-- m_out : out std_logic_vector(2 downto 1));
m_out0, m_out1, m_out2 : out bit);
end MUX_3_BIT_2_TO_1;
--end LabExCG6;

architecture M3BIT2TO1 of MUX_3_BIT_2_TO_1 is
--architecture Behavior of LabExCG6 is
component MUX_2_TO_1
port
(x,y: in bit;
s: in bit;
m: out bit);
end component;
begin
MUX0: MUX_2_TO_1 port map (a0, b0, sel, m_out0);
MUX1: MUX_2_TO_1 port map (a1, b1, sel, m_out1);
MUX2: MUX_2_TO_1 port map (a2, b2, sel, m_out2);
-- MUX0: MUX_2_TO_1 port map (a(0), b(0), sel, m_out(0));
-- MUX1: MUX_2_TO_1 port map (a(1), b(1), sel, m_out(1));
-- MUX2: MUX_2_TO_1 port map (a(2), b(2), sel, m_out(2));
end M3BIT2TO1;
--end Behavior;

entity MUX_2_TO_1 is
port
(x,y: in bit;
s: in bit;
m: out bit);
end MUX_2_TO_1;

architecture M2TO1 of MUX_2_TO_1 is
begin
m <= (NOT(s) AND x) OR (s AND y);
end M2TO1;

 

this is the revised code. much simpler

library ieee;
use ieee.std_logic_1164.all;

entity LabExCG6 is
port (u, v, w, x, y : in bit_vector(2 downto 0);
s : in bit_vector(2 downto 0);
m : out bit_vector(2 downto 0)
);
end LabExCG6;

architecture Behavior of LabExCG6 is
component MUX_3_BIT_2_TO_1
port
(a,b: in bit_vector(2 downto 0);
sel: in bit;
m_out: out bit_vector(2 downto 0)
);
end component;
signal m0, m1, m2: bit_vector(2 downto 0);
begin
MUX0: MUX_3_BIT_2_TO_1 port map (u, v, s(0), m0);
MUX1: MUX_3_BIT_2_TO_1 port map (w, x, s(0), m1);
MUX2: MUX_3_BIT_2_TO_1 port map (m0, m1, s(1), m2);
MUX3: MUX_3_BIT_2_TO_1 port map (m2, y, s(2), m);
end Behavior;

entity MUX_3_BIT_2_TO_1 is
port
( a, b: in bit_vector(2 downto 0);
sel : in bit;
m_out : out bit_vector(2 downto 0));
end MUX_3_BIT_2_TO_1;

architecture M3BIT2TO1 of MUX_3_BIT_2_TO_1 is
component MUX_2_TO_1
port
(x,y: in bit;
s: in bit;
m: out bit);
end component;
begin
MUX0: MUX_2_TO_1 port map (a(0), b(0), sel, m_out(0));
MUX1: MUX_2_TO_1 port map (a(1), b(1), sel, m_out(1));
MUX2: MUX_2_TO_1 port map (a(2), b(2), sel, m_out(2));
end M3BIT2TO1;

entity MUX_2_TO_1 is
port
(x,y: in bit;
s: in bit;
m: out bit);
end MUX_2_TO_1;

architecture M2TO1 of MUX_2_TO_1 is
begin
m <= (NOT(s) AND x) OR (s AND y);
end M2TO1;


3 bit 2-to-1 mux


--CG praktikum lagi
--Dec 29th 2010
--3 bit 2-to-1 mux

library ieee;
use ieee.std_logic_1164.all;

entity LabExCG5 is
port
( a0, a1, a2, b0, b1, b2 : in bit;
sel : in bit;
m_out0, m_out1, m_out2 : out bit);
end LabExCG5;

architecture Behavior of LabExCG5 is
component MUX_2_TO_1
port
(x,y: in bit;
s: in bit;
m: out bit);
end component;
begin
MUX0: MUX_2_TO_1 port map (a0, b0, sel, m_out0);
MUX1: MUX_2_TO_1 port map (a1, b1, sel, m_out1);
MUX2: MUX_2_TO_1 port map (a2, b2, sel, m_out2);
end Behavior;

entity MUX_2_TO_1 is
port
(x,y: in bit;
s: in bit;
m: out bit);
end MUX_2_TO_1;

 

architecture M2TO1 of MUX_2_TO_1 is
begin
m <= (NOT(s) AND x) OR (s AND y);
end M2TO1;


revised version (watch the difference, especially the RTL):


library ieee;
use ieee.std_logic_1164.all;

entity LabExCG5 is
port
( a, b: in bit_vector(2 downto 0);
sel : in bit;
m_out : out bit_vector(2 downto 0));
end LabExCG5;

architecture Behavior of LabExCG5 is
component MUX_2_TO_1
port
(x,y: in bit;
s: in bit;
m: out bit);
end component;
begin
MUX0: MUX_2_TO_1 port map (a(0), b(0), sel, m_out(0));
MUX1: MUX_2_TO_1 port map (a(1), b(1), sel, m_out(1));
MUX2: MUX_2_TO_1 port map (a(2), b(2), sel, m_out(2));
end Behavior;

entity MUX_2_TO_1 is
port
(x,y: in bit;
s: in bit;
m: out bit);
end MUX_2_TO_1;

 

architecture M2TO1 of MUX_2_TO_1 is
begin
m <= (NOT(s) AND x) OR (s AND y);
end M2TO1;


Bada Programming Tips for Beginner

I’m going to list some important things one should know before developing application with Bada:

1. Directory structure
   All we need is here. Tutorial is under Documents directory. Examples and Samples directory is very useful, it contains various examples that can help us to learn faster by looking how coding in bada should be written. IDE directory contains of everything needed by the IDE, including your workspaces. Resources is for storing pictures, etc.
   Knowing the directory structure is very important. For example, a database file, is stored in a very long path like this:
   
2. Library
   You need to know the content of the library. The more you are familiar with the library (namespaces, classes), the more easier you understand the examples and then develop your own code.
   
3. Examples
   There are many examples (shown at the right side of the IDE) that can be copied to your own workspace and then you can easily modify and compile.
   
4. Help
   You don’t need to google to find some answers about bada programming. It’s all here.
   

Now reading

Mapping an Arbitrary Message to an Elliptic Curve when Defined over GF(2^n), Brian King, Indiana University – Purdue University Indianapolis 723 W Michigan, SL 160 Indianapolis, IN 46202International Journal of Network Security, Vol.8, No.2, PP.169–176, Mar. 2009.

5-to-1 multiplexer

Lab exercise:

VHDL code:

Pin planner:

7-segment decoder

Lab Exercise:

VHDL Code:

--CG lagi praktikum
-- 7-segment
-- 5 Desember 2010


Pin planner:

*Important notes:
Each segment is illuminated by driving it to the logic value 0

Why Bada?

Maybe it’s to early to say but it seems that Bada is promising enough to compete Android. We’ll see.

These are links about Bada OS, it’s benefits and drawbacks, and also compared with other OS (Android, Symbian, Mobile Windows, Maemo):

1. http://www.badaforums.net/opinions/bada-vs-android/
2. http://www.pocketgamer.co.uk/r/Various/feature.asp?c=18614
3. http://www.thinkdigit.com/forum/mobile-monsters/130161-android-vs-bada-vs-symbain-vs-maemo.html
4. http://sefanboy.com/2010/07/07/samsung-galaxy-s-vs-samsung-wave-android-or-bada/
5. http://www.mobileshop.com/blog/mobile-phone-blogs/samsung-galaxy-s-vs-samsung-wave-is-bada-or-android-better/
6. http://www.knowyourmobile.com/features/416571/mwc_can_bada_compete_with_android.html

8-bit 2-to-1 multiplexer

Laboratory Exercise:

RTL View:

VHDL Code:

LIBRARY ieee;
USE ieee.std_logic_1164.all;

-- Simple module that connects the SW switches to the LEDR lights
ENTITY LabExCG2 IS
PORT( x0, x1, x2, x3, x4, x5, x6, x7 : IN BIT;
y0, y1, y2, y3, y4, y5, y6, y7 : IN BIT;
s : IN BIT;
m0, m1, m2, m3, m4, m5, m6, m7 : OUT BIT);
END LabExCG2;

ARCHITECTURE Behavior OF LabExCG2 IS
BEGIN
m0 <= (NOT(s) AND x0) OR (s AND y0);
m1 <= (NOT(s) AND x1) OR (s AND y1);
m2 <= (NOT(s) AND x2) OR (s AND y2);
m3 <= (NOT(s) AND x3) OR (s AND y3);
m4 <= (NOT(s) AND x4) OR (s AND y4);
m5 <= (NOT(s) AND x5) OR (s AND y5);
m6 <= (NOT(s) AND x6) OR (s AND y6);
m7 <= (NOT(s) AND x7) OR (s AND y7);
END Behavior;


Bada API Reference Documentation

Very important Bada Resources here

Bada ErrorCode : 0122

Reference for Bada error codes is here.

Going to debug this later.